Cache-based trace logging using tags in an upper-level cache

A processor comprising:

• a processing unit;
• a cache comprising a first cache level and a second cache level arranged as an upper cache level to the first cache level;
• and
• control logic that configures the processor to:
• influx a cache line into the first cache level from the second cache, including, based at least on the first cache level being a recording cache level,
• read a tag that is stored in the second cache level and that is associated with the cache line;
• based at least on reading the tag, determine whether a value of the cache line within the second cache level has been previously captured by a trace, the determining comprising one of:
• determining the cache line to have been previously captured by the trace when cache coherency protocol data indicates that the cache line has not been modified within the second cache level;
• or
• determining the cache line to have not been previously captured by the trace when cache coherency protocol data indicates that the cache line could have been modified within the second cache level;
• and
• perform one of:
• when the value of the cache line is determined to have been previously captured by the trace, following a logged value logic path when influxing the cache line into the first cache level;
• or
• when the value of the cache line is determined to have not been previously captured by the trace, following a non-logged value logic path when influxing the cache line into the first cache level.

A hardware storage device that stores computer-executable instructions that are executable at a processor to cause the processor to at least:

• influx a cache line into a first cache level from a second cache level arranged as an upper cache level to the first cache level, including, based at least on the first cache level being a recording cache level,
• read a tag that is stored in the second cache level and that is associated with the cache line;
• based at least on reading the tag, determine whether a value of the cache line within the second cache level has been previously captured by a trace, the determining comprising one of:
• determining the cache line to have been previously captured by the trace when cache coherency protocol data indicates that the cache line has not been modified within the second cache level;
• or
• determining the cache line to have not been previously captured by the trace when cache coherency protocol data indicates that the cache line could have been modified within the second cache level;
• and
• perform one of:
• when the value of the cache line is determined to have been previously captured by the trace, following a logged value logic path when influxing the cache line into the first cache level;
• or
• when the value of the cache line is determined to have not been previously captured by the trace, following a non-logged value logic path when influxing the cache line into the first cache level.