Technologies for preserving error correction capability in compute-in-memory operations
AssigneeIntel Corporation
InventorsChetan Chauhan, Wei Wu, Rajesh Sundaram, Shigeki Tomishima
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Abstract
Technologies for preserving error correction capability in compute-in-memory operations in a memory include memory media and a media access circuitry coupled with the memory media. The media access circuitry is to detect an error code adjustment state indicative of a failure in the initiated error correction. The media access circuitry is to adjust a voltage to the memory media to eliminate the error code correction adjustment state. Once eliminated, the media access circuitry is to perform the error correction on the read data.
Claims24
A memory device comprising:
- a memory controller;
- a memory media to store data;
- and
- media access circuitry, separate from the memory controller and local to the memory media, to:
- use a reference voltage to read data from the memory media, the reference voltage set in the memory media based on a reference voltage value,
- manage an error correction code (ECC) adjustment state to indicate whether errors in the data read from the memory media are any one of correctable and not correctable in the media access circuitry using an ECC, and
- perform a compute-in-memory (CIM) operation on the data read from the memory media based on the ECC adjustment state, including to:
- determine that the adjustment state is present to pause performance of the CIM operation, and
- determine that the adjustment state has been eliminated to resume performance of the CIM operation.
A system comprising:
- a processor;
- a memory to store data;
- and
- memory access circuitry, separate from the processor and local to the memory, to:
- use a reference voltage to read data from the memory, the reference voltage set by the memory based on a reference voltage value,
- manage an error correction code (ECC) adjustment state to indicate whether errors in the data read from the memory are any one of correctable and not correctable in the memory access circuitry using an ECC, and
- perform a compute-in-memory (CIM) operation on the data read from the memory based on the ECC adjustment state, including to:
- determine that the adjustment state is present to pause performance of the CIM operation, and
- determine that the adjustment state has been eliminated to resume performance of the CIM operation.
One or more non-transitory machine-readable media comprising a plurality of instructions encoded thereon that, in response to being executed, cause any of a device, system and apparatus having a memory in which to store data, to:
- use a reference voltage to read data from the memory, the reference voltage set by the memory based on a reference voltage value;
- manage an error correction code (ECC) adjustment state to indicate whether errors in the data read from the memory are any one of correctable and not correctable local to the memory using an ECC;
- and
- perform a compute-in-memory (CIM) operation on the data read from the memory based on the ECC adjustment state, including to:
- determine that the adjustment state is present to pause performance of the CIM operation, and
- determine that the adjustment state has been eliminated to resume performance of the CIM operation.
Dependencies are inferred from the claim text.