Managed multiple die memory QoS
AssigneeMicron Technology, Inc.
InventorSebastien Andre Jean
Life of this patent
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Abstract
Devices and techniques for implementing quality-of-service (QoS) parameters in a managed memory device having a number of memory dies are disclosed herein.
Claims25
A managed memory device, comprising:
- a memory controller;
- and
- a memory array comprising multiple memory dies,
- wherein the memory controller is configured to receive instructions from a host device and to allocate the received instruction to a first memory die of the multiple memory dies,
- wherein the first memory die is configured to:
- receive the first instruction from the memory controller;
- maintain a schedule of received instructions, including the first instruction;
- and
- determine a priority for the first instruction using a time of the first instruction and a quality-of-service (QoS) parameter.
A managed memory device, comprising:
- a memory controller;
- and
- a memory array comprising multiple memory dies,
- wherein the memory controller is configured to:
- receive instructions from a host device;
- allocate the received instructions to the multiple memory dies;
- maintain separate schedules for each of the multiple memory dies, comprising to:
- determine a priority for a first instruction in a first schedule for a first memory die using a quality-of-service (QoS) parameter and a time of the first instruction.
At least one non-transitory device-readable storage medium comprising instructions that, when executed by die logic of a first memory die of a managed memory device comprising a memory controller and multiple memory dies, cause the die logic to perform operations comprising:
- receiving a first instruction from a memory controller;
- maintain a schedule of received instructions, including the first instruction;
- and
- determine a priority for the first instruction using a time of the first instruction and a quality-of-service (QoS) parameter.
At least one non-transitory device-readable storage medium comprising instructions that, when executed by a memory controller of a managed memory device comprising a memory array having multiple memory dies, cause the memory controller to perform operations comprising:
- receiving instructions from a host device;
- allocating the received instructions to the multiple memory dies;
- maintaining separate schedules for each of the multiple memory dies, comprising:
- determining a priority for a first instruction in a first schedule for a first memory die using a quality-of-service (QoS) parameter and a time of the first instruction.
Dependencies are inferred from the claim text.