Techniques for non-consecutive logical addresses

A non-transitory computer-readable medium storing code comprising instructions which, when executed by a processor of an electronic device, cause the electronic device to:

• receive a first set of commands for accessing a memory device, the first set of commands comprising a first set of logical addresses that are non-consecutive;
• determine, based at least in part on a first mapping between logical addresses and physical addresses of the memory device, whether a first set of physical addresses are consecutively indexed, the first set of physical addresses corresponding to the first set of logical addresses;
• transfer a second mapping from the memory device to a volatile memory device based at least in part on determining that the first set of physical addresses are consecutively indexed, the second mapping indicating whether information stored at a second set of physical addresses that comprises the first set of physical addresses is valid;
• receive a second set of commands for accessing the memory device, the second set of commands comprising a second set of logical addresses that are non-consecutive;
• and
• retrieve, in response to the second set of commands, data from the memory device from a subset of the second set of physical addresses that correspond to the second set of logical addresses using the second mapping.

A method, comprising:

• receiving a first set of commands for accessing a memory device, the first set of commands comprising a first set of logical addresses that are non-consecutive;
• determining, based at least in part on a first mapping between logical addresses and physical addresses of the memory device, whether a first set of physical addresses are consecutively indexed, the first set of physical addresses corresponding to the first set of logical addresses;
• transferring a second mapping from the memory device to a volatile memory device based at least in part on determining that the first set of physical addresses are consecutively indexed, the second mapping indicating whether information stored at a second set of physical addresses that comprises the first set of physical addresses is valid;
• receiving a second set of commands for accessing the memory device, the second set of commands comprising a second set of logical addresses that are non-consecutive;
• and
• retrieving, in response to the second set of commands, data from the memory device from a subset of the second set of physical addresses that correspond to the second set of logical addresses using the second mapping.