Virtual network pre-arbitration for deadlock avoidance and enhanced performance

A memory controller comprising:

• a set of processor interfaces configured to couple to a processor;
• and
• an arbiter circuit coupled to the set of processor interfaces and configured to couple to a data path, wherein the arbiter circuit is configured to:
• receive a set of requests for transmission over the data path via the set of processor interfaces;
• classify the set of requests as either blocking or non-blocking;
• select a first request of the set of requests for transmission over the data path based on the classification of the set of requests as either blocking or non-blocking, wherein the first request has a first priority;
• receive a second request for transmission over the data path, wherein the second request has a second priority;
• compare the first priority to the second priority;
• and
• select a selected request for transmission over the data path from among the first request and the second request based on the comparison of the first priority to the second priority.

A device comprising:

• a set of processors;
• a memory controller coupled to the set of processors;
• and
• a set of memory devices coupled to the memory controller, wherein the memory controller is configured to:
• receive a set of requests directed to the set of memory devices from the set of processors;
• classify the set of requests as either blocking or non-blocking;
• select a first request of the set of requests for providing to the set of memory devices based on the classification of the set of requests as either blocking or non-blocking, wherein the first request has a first priority;
• receive a second request directed to the set of memory devices, wherein the second request has a second priority;
• compare the first priority to the second priority;
• and
• determine whether the first request or the second request is to be provided to the set of memory devices first based on the comparison of the first priority to the second priority.