Reducing leakage power in low-power mode of an integrated circuit device

A method of operating an integrated circuit device in a low-power mode to reduce leakage power in cells or modules of the integrated circuit device when respective ones of the cells or modules of the integrated circuit device are placed in respective low-power states, the method comprising:

• creating in advance at least one scan-chain pattern to apply, to each respective cell or module in the low-power mode, a set of inputs that results in a respective low-power state with reduced leakage power, the creating including:
• identifying, in advance, which respective ones of the cells or modules have highest leakage power consumption,
• for each respective one of the cells or modules identified as having the highest leakage power consumption, identifying, in advance, a respective combination of inputs to place that respective one of the cells or modules in a respective low-power state to minimize leakage power consumption, and
• configuring, in advance, the at least one scan-chain pattern to apply, to each respective one of the cells or modules identified as having the highest leakage power consumption, the respective combination of inputs to place that respective one of the cells or modules in a respective low-power state to minimize leakage power consumption;
• and
• upon entry of the integrated circuit device into the low-power mode, propagating the scan-chain pattern through the integrated circuit device.