Detection of known workload patterns
AssigneeIntel Corporation
InventorsShravan Kumar Belagal Math, Noor Mubeen, Harinarayanan Seshadri
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Abstract
Described are mechanisms and methods for applying Machine Learning (ML) techniques for power management at different levels of a power management stack. An apparatus may comprise a first circuitry, a second circuitry, and a third circuitry. The first circuitry may have a plurality of memory registers. The second circuitry may be operable to establish values for a plurality of features based on samples of values of the plurality of memory registers taken at one or more times within a range of time of predetermined length. The third circuitry may be operable to compare the plurality of features against a plurality of learned parameters for a reference workload.
Claims23
A non-transitory machine-readable storage media having machine-readable instructions that when executed cause one or more processors to perform a method comprising:
- establishing values for a plurality of features based on samples of values of a plurality of memory registers taken with different polling window sizes, including a first polling window size and a second polling window size which is greater than the first polling window size;
- and
- comparing the values for the plurality of features against values of a plurality of learned parameters for a reference workload;
- and
- triggering one or more actions based upon a result of the comparing, wherein the one or more actions comprise:
- for the first polling window size, selecting a frequency for at least one of a central processing unit (CPU) or a graphics processing unit (GPU);
- and
- for the second polling window size, determining whether to park or unpark at least one of a CPU core or a graphics-processing slice.
A non-transitory machine-readable storage media having machine readable instructions that when executed cause one or more processors to perform a method comprising:
- establishing values for a plurality of features based on samples of values of a plurality of memory registers of a central processing unit (CPU), wherein the samples are taken with different polling window sizes, including one polling window size and another polling window size which is greater than the one polling window;
- comparing the values for the plurality of features against values of a plurality of learned parameters for a reference workload;
- and
- triggering one or more actions based upon a result of the comparing, wherein the one or more actions comprise:
- for the one polling window size, selecting a frequency for the CPU;
- and
- for the another polling window size, determining a power limit for the CPU.
A system, comprising:
- a memory to store instructions;
- and
- a processor circuitry coupled to the memory, wherein the processor circuitry is to execute the instructions to:
- establish values for a plurality of features based on samples of values of a plurality of memory registers taken with different polling window sizes, including one Dolling window size and another polling window size which is greater than the one polling window size;
- compare the values for the plurality of features against values of a plurality of learned parameters for a reference workload;
- and
- trigger one or more actions based upon a result of the comparing, wherein the one or more actions comprise:
- for the one polling window size, selecting a frequency for at least one of a central processing unit (CPU) or a graphics processing unit (GPU);
- and
- for the another polling window size, determine whether to change a frequency-selection algorithm for the at least one of the CPU or the GPU.
Dependencies are inferred from the claim text.