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US 11,687,104 B2Granted
Power supply rejection enhancer
AssigneeQUALCOMM Incorporated
InventorsKuan Chuang Koay, Hua Guan, Jize Jiang
Life of this patent
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Abstract
In certain aspects, a system includes an amplifying circuit having an input and an output, wherein the input of the amplifying circuit is coupled to a gate of a pass transistor of a low dropout (LDO) regulator. The system also includes a metal-oxide-semiconductor (MOS) capacitor coupled between the output of the amplifying circuit and the input of the amplifying circuit.
Claims6
A system, comprising:
- an amplifying circuit having an input and an output, wherein the input of the amplifying circuit is coupled to a gate of a pass transistor of a low dropout (LDO) regulator, wherein the amplifying circuit includes
- an amplifier having a first input, a second input, and an output, wherein the output of the amplifier is coupled to the output of the amplifying circuit and the first input of the amplifier is coupled to the input of the amplifying circuit,
- a first resistor coupled to the second input of the amplifier, and
- a second resistor coupled between the output of the amplifier and the second input of the amplifier;
- and
- a metal-oxide-semiconductor (MOS) capacitor coupled between the output of the amplifying circuit and the input of the amplifying circuit, wherein the first resistor is coupled between the second input of the amplifier and an output of the LDO regulator.
3 more elements
Dependencies are inferred from the claim text.