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AssigneeChengdu Haiguang Integrated Circuit Design Co., Ltd.
InventorsYuqian Cedric Wong, Shuiyin Yao, Hongchang Liang, Zhimin Tang
Estimating the term…
A chip, a chip testing method and an electronic device are provided. The chip includes a combinational logic and a data path gating; the data path gating includes a first input terminal and an output terminal, the first input terminal of the data path gating detects a test enable signal, and the output terminal of the data path gating is connected to the combinational logic; the test enable signal is used to switch a test mode of the chip; the data path gating is configured to output a data path gating control signal to the combinational logic, in a case where the detected test enable signal indicates that a current test mode is irrelevant to a data path function of the combinational logic; and the combinational logic is configured to disable the data path function after receiving the data path gating control signal, to disable data path toggling.
A chip, comprising:
A chip testing method, the chip testing method being adapted for a data path gating, a first input terminal of the data path gating being connected to a scan enable port of a first scan chain, so as to acquire a test enable signal input to the scan enable port, a second input terminal being connected to another combinational logic that is different from a combinational logic, an output terminal of the data path gating being connected to the combinational logic, the first scan chain being connected to the combinational logic, and the chip testing method comprising:
An electronic device, comprising a chip,
Dependencies are inferred from the claim text.