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US 11,686,768 B2Granted
System and method of testing single DUT through multiple cores in parallel
AssigneeTest Research, Inc.
InventorsChing-Chih Lin, Hsin-Wei Huang
Life of this patent
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Abstract
The present disclosure provides a method of testing a single device under test (DUT) through multiple cores in parallel, which includes steps as follows. The test quantity of the DUT is calculated; the test quantity of the DUT is evenly allocated to to a plurality of test cores, so as to control a period of testing the DUT through the test cores in parallel.
Claims16
A system of testing a single device under test (DUT) through multiple cores in parallel, and the system comprising:
- a computer device;
- and
- a plurality of test cores electrically connected to the computer device, and the computer device configured to evenly allocate a test quantity of the DUT to the test cores, so as to control a period of testing the DUT through the test cores in parallel.
A method of testing a single DUT through multiple cores in parallel, and the method comprising steps of:
- calculating a test quantity of the DUT;
- and
- evenly allocating the test quantity of the DUT to a plurality of test cores, so as to control a period of testing the DUT through the test cores in parallel.
Dependencies are inferred from the claim text.