System, apparatus and method for functional testing of one or more fabrics of a processor

A non-transitory machine-readable medium having stored thereon instructions, which if performed by a machine cause the machine to perform a method comprising:

• in response to receiving a test signal in a system on chip (SoC) during functional operation of a system including the SoC, sending test content to one or more fabrics of the SoC, to enable the one or more fabrics to test functionality of the one or more fabrics;
• requesting test result information of the functionality test from the one or more fabrics;
• processing the test result information;
• and
• communicating the processed test result information to a non-volatile memory coupled to the SoC, and in response to identifying a correctable error, initiating correction of the correctable error.

A system comprising:

• a system on chip (SoC) comprising:
• at least one core to execute instructions;
• an interconnect coupled to the at least one core;
• a first fabric coupled to the interconnect to couple a first agent and a second agent, the first fabric including a first storage to store test result information regarding a functional test of the first fabric and a sideband interface to couple the first fabric to a sideband network including a plurality of sideband routers;
• and
• a fabric bridge controller coupled to the first fabric, the fabric bridge controller to initiate, during normal operation of the system, the functional test of the first fabric in response to a test signal, receive a result of the functional test of the first fabric comprising the test result information, and send a test report based at least in part on the result to a security circuit;
• the security circuit coupled to the SoC, wherein the security circuit is to send the test signal to the fabric bridge controller and provide the test report at least to a non-volatile memory, and in response to an error indication send a message to a system controller to cause the system controller to shut down the system until a corrective action is taken on the system;
• and
• the non-volatile memory coupled to the security circuit, wherein the non-volatile memory is to store the test report and one or more test programs.