Method and non-transitory computer-readable medium for performing multiple tests on a device under test
AssigneeNanya Technology Corporation
InventorsChien-Hwa Su, Chang-Hung Wu
Life of this patent
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Abstract
A method and non-transitory computer-readable medium for performing multiple tests on a device under test (DUT) are provided. The method includes inputting a plurality of test patterns to a test apparatus, performing each of the plurality of test patterns on the DUT without interruption, and obtaining a respective result for the DUT in response to each of the plurality of test patterns.
Claims14
A method for performing multiple tests on a device under test (DUT), comprising:
- inputting a plurality of test patterns in a test apparatus, wherein each of the plurality of test patterns has at least two signals input into the test apparatus, wherein each of the signals has an attribute selected from a group consisting of voltage, current, data rate, and temperature;
- storing each of the plurality of test patterns in a respective register, wherein each of the registers stores two or more signals of each of the plurality of test patterns;
- automatically performing the plurality of test patterns stored in the registers on the DUT without interruption, wherein the test patterns stored in the registers are performed on the DUT independently with each other;
- obtaining a respective result for the DUT in response to the signals of each of the plurality of test patterns stored in the respective register, such that the results are obtained correspondingly in order to determine whether the DUT is operable or not;
- generating a Shmoo plot based on all the respective results to obtain a virtual edge;
- and
- determine operating regions of the DUT after the virtual edge is obtained.
A non-transitory computer-readable medium, storing computer-executable instructions executed on a computer system for performing a method for performing multiple tests on a device under test (DUT), wherein the method comprises:
- inputting a plurality of test patterns in a test apparatus, wherein each of the plurality of test patterns has at least two signals input into the test apparatus, wherein each of the signals has an attribute selected from a group consisting of voltage, current, data rate, and temperature;
- storing each of the plurality of test patterns in a respective register, wherein each of the registers stores two or more signals of each of the plurality of test patterns;
- automatically performing the plurality of test patterns stored in the registers on the DUT without interruption, wherein the test patterns stored in the registers are performed on the DUT independently with each other;
- obtaining a respective result for the DUT in response to the signals of each of the plurality of test patterns stored in the respective register, such that the results are obtained correspondingly in order to determine whether the DUT is operable or not;
- generating a Shmoo plot based on all the respective results to obtain a virtual edge;
- and
- determine operating regions of the DUT after the virtual edge is obtained.
Dependencies are inferred from the claim text.