Memory device with a plurality of metal chalcogenide layers
AssigneeKioxia Corporation
InventorsTsunehiro Ino, Yukihiro Nomura, Kazuhiko Yamamoto, Koji Usuda
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AssigneeKioxia Corporation
InventorsTsunehiro Ino, Yukihiro Nomura, Kazuhiko Yamamoto, Koji Usuda
Estimating the term…
A memory device including a first conductive layer; a second conductive layer; a resistance change region provided between the first conductive layer and the second conductive layer; a first region provided between the resistance change region and the first conductive layer, the first region including a first element selected from the group consisting of niobium, vanadium, tantalum, and titanium, and a second element selected from the group consisting of oxygen, sulfur, selenium, and tellurium, the first region having a first atomic ratio of the first element to the second element; and a second region provided between the first region and the resistance change region, the second region including the first element and the second element, the second region having a second atomic ratio of the first element to the second element, the second atomic ratio being smaller than the first atomic ratio.
A memory device comprising:
A memory device comprising:
A memory device comprising:
A memory device comprising:
Dependencies are inferred from the claim text.