Programmable delay device enabling large delay in small package

A programmable delay device comprising:

• an input sampling stage including M sampling switched capacitor storage elements, the M sampling switched capacitor storage elements adapted to sequentially sample and hold a corresponding portion of an input RF signal, the thus sampled and held portions of the input RF signal being input sampled signals;
• a programmable delay stage including:
• M programmable switched capacitor banks, each programmable switched capacitor bank including N delay switched capacitor storage elements, each delay switched capacitor storage element adapted to sample and hold a corresponding time interleaved portion of a corresponding input sampled signal, the thus sampled and held signals being delay sampled switched signals, each delay switch capacitor storage element coupled to a corresponding delay output switch;
• and
• an enable timing circuit adapted to receive a desired delay value, the enable timing circuit including a digital counter, the digital counter adapted to count to the desired delay value, upon reaching the desired delay value the enable timing circuit is adapted to enable a corresponding delay output switch;
• and
• an output reconstruction stage including M output reconstruction switches, each output reconstruction switch coupled to a corresponding delay output switch, each output reconstruction switch adapted to output a corresponding time interleaved delay sampled switched signal, the thus output signals being output reconstruction signals, the output reconstruction stage adapted to output the output reconstruction signals in a sequential manner thereby generating a reconstructed output RF signal.