Lower-skew receiver circuit with RF immunity for controller area network (CAN)
AssigneeTexas Instruments Incorporated
InventorsRichard Sterling Broughton, Vijayalakshmi Devarajan, Richard Edwin Hubbard
Life of this patent
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Abstract
A circuit (e.g., implemented as part of a controller area network (CAN) bus receiver includes a pre-amplifier stage having first and second outputs. The circuit also includes a comparator having first and second inputs. The first input is coupled to the first output of the pre-amplifier stage, and the second input is coupled to the second output of the pre-amplifier stage. The comparator includes an input differential transistor pair, a second pair of transistors coupled to the input differential transistor pair in a cascode configuration, and a push-pull output stage coupled to the second pair of transistors.
Claims10
A circuit, comprising:
- a pre-amplifier stage having first and second outputs;
- a comparator having first and second inputs, the first input coupled to the first output of the pre-amplifier stage, and the second input coupled to the second output of the pre-amplifier stage, the comparator including:
- an input differential transistor pair wherein the differential transistor pair comprises:
- a first metal oxide field effect transistor (MOSFET) having a gate, a drain and a source wherein the gate of the first MOSFET is directly coupled to the first input of the comparator;
- and
- a second (MOSFET) having a gate, a drain and a source wherein the gate of the second MOSFET is directly coupled to the second input of the comparator;
- and
- a second pair of transistors in a cascode configuration wherein the second pair of transistors comprises:
- a third MOSFET haying a gate, a drain and a source wherein the source of the third MOSFET is directly coupled to the drain of the first MOSFET;
- and
- a fourth MOSFET haying a gate, a drain and a source wherein the source of the fourth MOSFET is directly coupled to the drain of the second MOSFET;
- and
- a push-pull output stage wherein the push-pull output stage comprises:
- a fifth MOSFET haying a gate, a drain and a source;
- and
- a sixth MOSFET haying a gate, a drain and a source wherein the gate of the sixth transistor is directly coupled to the drain of the fourth transistor, and the drain of the sixth transistor is directly coupled to the drain of the fifth transistor.
Dependencies are inferred from the claim text.