Voltage interpolator
AssigneeAnalog Devices International Unlimited Company
InventorsGerard Mora Puchalt, Italo Carlos Medina Sánchez Castro, Jesús Bonache Martinez
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Abstract
Techniques for interpolating two voltages without loading them and without requiring significant power or additional area are described. The techniques include specific topologies for the buffering amplifiers that offer accuracy by cancelling systematic error sources without relying on high gain, thus simplifying the frequency compensation, and reducing power consumption. This can be achieved by biasing the amplifiers from the load current by an innovative feedback structure, which can remove the need for high impedance nodes inside the amplifiers.
Claims20
A circuit to generate an output voltage, the circuit comprising:
- a voltage divider including at least a first resistive device and a second resistive device, wherein the output voltage is generated at a node along the voltage divider;
- a first closed-loop amplifier circuit to:
- drive a first terminal (Va) of the voltage divider;
- and
- receive a first reference voltage (VA),
- wherein the first closed-loop amplifier circuit is configured to derive first biasing currents from a current through the voltage divider;
- and
- a second closed-loop amplifier circuit to:
- drive a second terminal (Vb) of the voltage divider;
- and
- receive a second reference voltage (VB),
- wherein the second closed-loop amplifier circuit is configured to derive second biasing currents from the current through the voltage divider.
A method of generating an output voltage using a circuit including a voltage divider having at least a first resistive device and a second resistive device, wherein the output voltage is generated at a node along the voltage divider, the method comprising:
- driving a first terminal (Va) of the voltage divider;
- receiving a first reference voltage (VA);
- deriving first biasing currents from a current through the voltage divider;
- driving a second terminal (Vb) of the voltage divider;
- receiving a second reference voltage (VB);
- and
- deriving second biasing currents from the current through the voltage divider.
A circuit to generate an output voltage, the circuit comprising:
- a voltage divider including at least a first resistive device and a second resistive device, wherein the output voltage is generated at a node along the voltage divider;
- a first closed-loop amplifier circuit including a first output transistor driving the voltage divider and having a first gate terminal, the first closed-loop amplifier circuit to:
- drive a first terminal (Va) of the voltage divider;
- and
- receive a first reference voltage (VA),
- wherein the first closed-loop amplifier circuit is configured to derive first biasing currents from a current through the voltage divider;
- and
- a second closed-loop amplifier circuit to:
- drive a second terminal (Vb) of the voltage divider;
- and
- receive a second reference voltage (VB),
- wherein the second closed-loop amplifier circuit is configured to derive second biasing currents from the current through the voltage divider,
- wherein the first closed-loop amplifier circuit includes a first tail current circuit to generate a first tail current in response to a voltage at the first gate terminal of the first output transistor, and wherein the first tail current is a scaled version of the current through the voltage divider.
Dependencies are inferred from the claim text.