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US 11,656,846 B2Granted
Multiply-accumulate “0” data gating
AssigneeIntel Corporation
InventorsYaniv Fais, Tomer Bar-On, Jacob Subag, Jeremie Dreyfuss, Lev Faivishevsky, Michael Behar, Amit Bleiweiss, Guy Jacob, Gal Leibovich, Itamar Ben-Ari, Galina Ryvchin, Eyal Yaacoby
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Abstract
In an example, an apparatus comprises a plurality of execution units and logic, at least partially including hardware logic, to gate at least one of a multiply unit or an accumulate unit in response to an input of value zero. Other embodiments are also disclosed and claimed.
Claims25
An apparatus comprising:
- an instruction cache to receive graphics processing instructions;
- a general-purpose graphics processing compute block comprising a plurality of graphics processing cores to perform operations to execute the graphics processing instructions;
- and
- processing circuitry to:
- receive, into at least one of a multiply unit or an accumulate unit, a first operand and a second operand from a layer of a convolutional neural network, wherein the first operand and the second operand comprise at least one of inference weights or activations of the convolutional neural network;
- and
- responsive to at least one of the first operand or the second operand having a value of negative one, cause the second operand to be negative and bypass the multiply unit, such that the multiply unit performs no operations on the first operand or the second operand.
4 more elements
A method, comprising:
- receiving graphics processing instructions in an instruction cache of a general purpose graphics processor;
- performing operations to execute the graphics processing instructions;
- receiving, into at least one of a multiply unit or an accumulate unit of the general purpose graphics processor, a first operand and a second operand from a layer of a convolutional neural network, wherein the first operand and the second operand comprise at least one of inference weights or activations of the convolutional neural network;
- and
- responsive to at least one of the first operand or the second operand having a value of negative one, causing the second operand to be negative and bypassing the multiply unit, such that the multiply unit performs no operations on the first operand or the second operand.
2 more elements
A system comprising:
- a memory;
- an instruction cache to receive graphics processing instructions;
- a general-purpose graphics processing compute block comprising a plurality of graphics processing cores to perform operations to execute the graphics processing instructions;
- and
- processing circuitry to:
- receive, into at least one of a multiply unit or an accumulate unit, a first operand and a second operand from a layer of a convolutional neural network,
- wherein the first operand and the second operand comprise at least one of inference weights or activations of the convolutional neural network;
- and
- responsive to at least one of the first operand or the second operand having a value of negative one, cause the second operand to be negative and bypass the multiply unit, such that the multiply unit performs no operations on the first operand or the second operand.
6 more elements
A non-transitory machine-readable medium having stored thereon executable computer program instructions that, when executed by one or more processors, cause the one or more processors to perform operations comprising:
- receiving graphics processing instructions in an instruction cache of a general purpose graphics processor;
- performing operations to execute the graphics processing instructions;
- receiving, into at least one of a multiply unit or an accumulate unit of the general purpose graphics processor, a first operand and a second operand from a layer of a convolutional neural network, wherein the first operand and the second operand comprise at least one of inference weights or activations of the convolutional neural network;
- and
- responsive to at least one of the first operand or the second operand having a value of negative one, causing the second operand to be negative and bypassing the multiply unit, such that the multiply unit performs no operations on the first operand or the second operand.
2 more elements
Dependencies are inferred from the claim text.