Multi-pixel caching scheme for lossless encoding

A system comprising one or more processors, coupled to memory and configured to:

• identify at least one non-repeating sub-sequence of pixels within a sequence of pixels having one or more repeated pixels;
• encode the one or more repeated pixels using a first type of encoding scheme;
• and create a representation of the at least one non-repeating sub-sequence to comprise a first value identifying a cache associated with a number of pixels repeating in the at least one non-repeating sub-sequence and a second value identifying a location with the cache where the at least one non-repeating subsequence is stored.

A system comprising one or more processors, coupled to memory and configured to:

• identify at least one non-repeating sub-sequence of pixels within a sequence of pixels having one or more repeated pixels;
• encode the one or more repeated pixels using a first type of encoding scheme;
• and create a representation of the at least one non-repeating subsequence to comprise a first value identifying a cache associated with a number of pixels repeating in the at least one non-repeating sub-sequence and a second value identifying a location with the cache where the at least one non-repeating sub-sequence is stored.