Self-aligned etch back for vertical three dimensional (3D) memory

A method for forming an array of vertically stacked memory cells, having horizontally oriented access devices and horizontally oriented storage nodes, comprising:

• depositing layers of a first dielectric material, a semiconductor material, and a second dielectric material, in repeating iterations vertically to form a vertical stack;
• performing an etch to form a plurality of first vertical openings having a first horizontal direction and a second horizontal direction, through the vertical stack and extending predominantly in the second horizontal direction to form elongated vertical, pillar columns with first vertical sidewalls in the vertical stack;
• conformally depositing a conductive material on a gate dielectric material in the plurality of first vertical openings;
• performing an etch to remove portions of the conductive material in the plurality of first vertical openings to form a plurality of separate, vertical conductive lines along the first vertical sidewalls;
• depositing a third dielectric material in the plurality of first vertical openings;
• performing an etch to form a plurality of second vertical openings in the third dielectric material to expose second vertical sidewalls in the vertical stack;
• performing a lateral etch to form a plurality of first horizontal openings in the layers of the semiconductor material;
• depositing a selective fill material selective to the semiconductor material to fill the plurality of first horizontal openings in the elongated vertical, pillar columns;
• performing an etch to form a plurality of third vertical openings to expose third vertical sidewalls in the vertical stack adjacent access device regions;
• and
• performing an etch to selectively remove the fill material along the second horizontal direction to form a plurality of second horizontal openings in which to form access devices.

A method for forming an array of vertically stacked memory cells, having horizontally oriented access devices and horizontally oriented storage nodes, comprising:

• depositing layers of an oxide material, a polysilicon material, and a nitride material, in repeating iterations vertically to form a vertical stack;
• performing an etch to form a plurality of first vertical openings having a first horizontal direction and a second horizontal direction, through the vertical stack and extending predominantly in the second horizontal direction to form elongated vertical, pillar columns with first vertical sidewalls in the vertical stack;
• conformally depositing a doped semiconductor material on a gate dielectric material in the plurality of first vertical openings;
• performing an etch to remove portions of the doped semiconductor material in the plurality of first vertical openings to form a plurality of separate, vertical conductive lines along the first vertical sidewalls;
• depositing a dielectric material in the plurality of first vertical openings;
• performing an etch to form a plurality of second vertical openings in the dielectric material to expose second vertical sidewalls in the vertical stack;
• performing a lateral etch that is selective to the oxide material and the nitride material to form a plurality of first horizontal openings in the layers of the semiconductor material;
• depositing a selective fill material selective to the semiconductor material to fill the plurality of first horizontal openings in the elongated vertical, pillar columns;
• performing an etch to form a plurality of third vertical openings to expose third vertical sidewalls in the vertical stack adjacent access device regions;
• performing an etch that is selective to the polysilicon material to selectively remove the fill material along the second horizontal direction to form a plurality of second horizontal openings;
• and
• forming self-aligned storage nodes in the plurality of second horizontal openings.