RFID tag

An RFID tag comprising:

• an RFIC module including a base substrate that includes a principal surface and an RFIC chip mounted thereon that includes first and second input/output terminals;
• and
• an antenna element including first and second antenna-side terminals, wherein the RFIC module includes, on the principal surface of the base substrate:
• a first chip connection terminal connected to the first input/output terminal of the RFIC chip,
• a second chip connection terminal connected to the second input/output terminal of the RFIC chip,
• a first module-side terminal connected to the first antenna-side terminal of the antenna element by either direct current or capacitive coupling,
• a second module-side terminal connected to the second antenna-side terminal of the antenna element by either direct current or capacitive coupling,
• a first wiring pattern connecting the first chip connection terminal to the first module-side terminal,
• a second wiring pattern connecting the second chip connection terminal to the second module-side terminal, and
• a third wiring pattern connecting the first module-side terminal to the second module-side terminal, and
• wherein the RFIC chip, the first wiring pattern, the second wiring pattern, and the third wiring pattern are disposed in a region on the principal surface of the base substrate and are interposed entirely between respective sides of the first module-side terminal and the second module-side terminal that face each other.

An RFIC module comprising:

• a base substrate;
• an RFIC chip mounted on the base substrate that includes first and second input/output terminals;
• a first chip connection terminal disposed on the base substrate and that is connected to the first input/output terminal of the RFIC chip;
• a second chip connection terminal disposed on the base substrate and that is connected to the second input/output terminal of the RFIC chip;
• first and second module-side terminals disposed on opposing ends of the base substrate in a longitudinal direction thereof;
• a first wiring pattern disposed on the base substrate and connecting the first chip connection terminal to the first module-side terminal;
• a second wiring pattern disposed on the base substrate and connecting the second chip connection terminal to the second module-side terminal, and
• a third wiring pattern disposed on the base substrate and connecting the first module-side terminal directly to the second module-side terminal,
• wherein the RFIC chip, the first wiring pattern, the second wiring pattern, and the third wiring pattern are disposed in a region on a principal surface of the base substrate and are interposed entirely between respective sides of the first module-side terminal and the second module-side terminal of the RFIC module that face each other.