Microelectronic package with substrate-integrated components

An IC package, comprising:

• a plurality of IC dies in an overmold, each IC die electromagnetically shielded from other IC dies by conductive through-mold vias (TMVs) in the overmold;
• and
• a package substrate having a first face and an opposing second face, the plurality of IC dies coupled to the first face of the package substrate, the package substrate further comprising:
• a first redistribution layer proximate to the first face of the package substrate, the first redistribution layer having a first thickness;
• a second redistribution layer proximate to the second face of the package substrate, the second redistribution layer having a second thickness;
• and
• a first plurality of cavities in the first redistribution layer and a second plurality of cavities in the second redistribution layer,
• wherein:
• the first plurality of cavities and the second plurality of cavities are aligned with the plurality of IC dies,
• each cavity is electromagnetically shielded from other cavities in the respective redistribution layer by conductive traces along a boundary of the cavity,
• the conductive traces are aligned with the conductive TMVs in the overmold,
• the conductive TMVs are coupled to the conductive traces in the first redistribution layer, and
• the conductive traces in the first redistribution layer are coupled to the conductive traces in the second redistribution layer by TSVs.

An IC die for use in a radio frequency (RF) front-end module (FEM), the IC die comprising:

• a plurality of metallization layers;
• a first circuit related to a first function of the RF FEM, the first circuit coupled with a first component in a first cavity in a first metallization layer, and a second component in a second cavity in a second metallization layer;
• and
• a second circuit related to a second function of the RF FEM, the second circuit coupled with a third component in a third cavity in the first metallization layer and a fourth component in a fourth cavity in the second metallization layer,
• wherein:
• a first trench via located between the first metallization layer and the second metallization layer communicatively couples the first component and the second component,
• a second trench via located between the first metallization layer and the second metallization layer communicatively couples the third component and the fourth component,
• a first conductive trace around the first cavity electromagnetically shields the first cavity from the third cavity, and
• a second conductive trace around the second cavity electromagnetically shields the second cavity from the fourth cavity.