Shared memory mesh for switching

A method comprising:

• in a switch a mesh of multiple nodes:
• receiving an operation at a node of the multiple nodes wherein a path of the operation through the multiple nodes is based on at least one latency estimate;
• permitting an operation to pass through to another node of the multiple nodes if the operation is to proceed in a same direction and no contention is encountered;
• and
• causing buffering of the operation in a drop off router if contention is encountered, wherein contention comprises:
• the operation has reached a destination memory device,
• the operation encounters a turning operation, or
• backpressure is applied by another node connected to the node.

A system comprising:

• a switch comprising:
• at least one ingress port;
• a mesh;
• at least one egress port, wherein the mesh comprises:
• a first node;
• a second node coupled to the first node;
• a third node coupled to the first node;
• and
• a memory device coupled to the first node, wherein a path of an operation through multiple nodes of the mesh is based on at least one latency estimate, wherein the first node is to:
• permit pass-through to the second node of the operation based on the operation is to proceed in a same direction to a next node or
• cause buffering in a drop off router of the operation if contention is encountered, wherein contention comprises:
• the operation has reached a destination memory device,
• the operation encounters a turning operation,
• backpressure is applied by a node connected to the first node.