Gate driver output protection circuit
AssigneeSkyworks Solutions, Inc.
InventorsPéter Onódy, Tamás Marozsák, Michael R. May, Fernando Naim Lavalle Aviles, Patrick De Bakker
Life of this patent
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Abstract
A method for protecting a system including a driver integrated circuit includes receiving a driver input signal. The method includes driving an output signal externally to the driver integrated circuit. The output signal is driven based on the driver input signal and an indication of a delay between receipt of an edge of the driver input signal and arrival of a corresponding edge of the output signal at an output node coupled to a terminal of the driver integrated circuit.
Claims21
A method for protecting a system including a driver integrated circuit, the method comprising:
- receiving a driver input signal;
- logically combining a logic signal with the driver input signal to generate an indication of whether a rising edge of the driver input signal is delayed in an output signal at an output node of the driver integrated circuit coupled to a terminal of the driver integrated circuit, the logic signal being asserted in response to completion of a corresponding rising edge of the output signal;
- logically combining a second logic signal with the driver input signal to generate a second indication of whether a falling edge of the driver input signal is delayed in the output signal at the output node, the second logic signal being asserted in response to completion of a corresponding falling edge of the output signal;
- generating an error signal based on the indication and the second indication, ;
- and
- driving the output signal externally to the driver integrated circuit, the output signal being driven based on the driver input signal and the error signal.
An integrated circuit for controlling a high-power drive device, the integrated circuit comprising:
- a driver circuit configured to drive an output signal to a terminal of the integrated circuit, the output signal being driven based on a driver input signal and an error signal;
- and
- a logic circuit configured to generate the error signal based on a first logical combination of a logic signal and the driver input signal indicating whether a rising edge of the driver input signal is delayed in the output signal and a second logical combination of a second logic signal and the driver input signal indicating whether a falling edge of the driver input signal is delayed in the output signal, the logic signal being asserted in response to completion of a corresponding rising edge of the output signal, and the second logic signal being asserted in response to completion of a corresponding falling edge of the output signal.
An integrated circuit for controlling a high-power drive device, the integrated circuit comprising:
- a driver circuit configured to drive an output signal to a terminal of the integrated circuit, the output signal being driven based on a driver input signal and an error signal;
- and
- a logic circuit configured to generate the error signal based on an indication of a delay between receipt of an edge of the driver input signal and arrival of a corresponding edge of the output signal at an output node of the integrated circuit coupled to the terminal, the logic circuit comprising a counter circuit configured to add a first predetermined value to a counter value corresponding to an estimate of a long-term average of the delay in response a transition of the driver input signal in the absence of a corresponding transition of the output signal, and configured to subtract a second predetermined value from the count value in a predetermined interval, the indication of the delay being based on the counter value.
Dependencies are inferred from the claim text.