Latch

A latch comprising:

• cross coupled invertors comprising a first invertor and a second inventor, wherein a first end of the first invertor is connected to a first internal node and a second end of the first invertor is directly connected to the ground, wherein a first end of the second invertor is connected to a second internal node and a second end of the second invertor is directly connected the ground, wherein the second internal node is different from the first internal node, and wherein the first invertor and the second invertor are cross coupled at a first data node and a second data node;
• a first transistor, wherein a source of first transistor is connected to a power node, a drain of first transistor is connected to the first internal node, and a gate of the first transistor is connected to a first input terminal;
• a second transistor, wherein a source of the second transistor is connected to the power node, a drain of second transistor is connected to the second internal node, and a gate of the second transistor is connected to a second input terminal;
• a third transistor connected between a supply voltage node and the power node, wherein the supply voltage node is different than the first internal node and the second internal node, and wherein the third transistor connects the power node to the supply voltage node in response to an enable signal changing to a first value;
• and
• a fourth transistor connected between the power node and the ground, wherein the fourth transistor connects the power node to the ground in response to an enable signal changing to a second value.

A method for operating a latch, the method comprising:

• receiving a first input signal at a first input terminal of an input circuit of a latch;
• receiving a second input signal at a second input terminal of the input circuit of the latch, wherein the latch comprises-cross-coupled invertors, wherein a first end of a first invertor of the cross-coupled invertors is connected to a first internal node and a second end of a second end of the first invertor is connected directly to the ground, wherein a first end of a second invertor of the cross-coupled invertors is connected to a second internal node and a second end of the second invertor is connected directly to the ground, wherein the second internal node is different from the first internal node, wherein the cross-coupled invertors are connected to the input circuit, and wherein the input circuit is connected between a power node and the first internal node and the second internal node;
• enabling, in response to receiving the first input signal and the second input signal, a first transistor connected between the power node and a supply voltage node, wherein the supply voltage node is different than the first and second internal nodes, wherein, when enabled, the first transistor connects the power node to the supply voltage node, wherein enabling the first transistor comprises enabling the first transistor by an enable signal changing to a first value, and wherein the enable signal changes to the first value during a latch phase;
• and
• enabling, in response to the enable signal changing to a second value, a second transistor connected between the power node and the ground to connect the power node to the ground.