Level shifter

A level shifter comprising:

• a buffer circuit providing a first signal and a first inverted signal of opposite phases;
• a first shift circuit electrically coupled between a first system high voltage terminal and a system low voltage terminal, and the first shift circuit being configured to provide a second signal and a second inverted signal of the opposite phases according to the first signal and the first inverted signal, wherein the first shift circuit comprises:
• a plurality of first stacking transistors;
• and
• a first voltage divider circuit electrically coupled between the first system high voltage terminal and the system low voltage terminal, and being configured to provide a first inner bias to gate terminals of the first stacking transistors;
• and
• a second shift circuit electrically coupled between a second system high voltage terminal and the system low voltage terminal, wherein the second shift circuit generates a plurality of output signals according to the second signal and the second inverted signal.