Trench isolation for advanced integrated circuit structure fabrication
AssigneeIntel Corporation
InventorsMichael L. Hattendorf, Curtis Ward, Heidi M. Meyer, Tahir Ghani, Christopher P. Auth
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AssigneeIntel Corporation
InventorsMichael L. Hattendorf, Curtis Ward, Heidi M. Meyer, Tahir Ghani, Christopher P. Auth
Estimating the term…
Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a fin comprising silicon, the fin having a lower fin portion and an upper fin portion. A first insulating layer is directly on sidewalls of the lower fin portion of the fin, wherein the first insulating layer is a non-doped insulating layer comprising silicon and oxygen. A second insulating layer is directly on the first insulating layer directly on the sidewalls of the lower fin portion of the fin, the second insulating layer comprising silicon and nitrogen. A dielectric fill material is directly laterally adjacent to the second insulating layer directly on the first insulating layer directly on the sidewalls of the lower fin portion of the fin.
A method of fabricating an integrated circuit structure, the method comprising:
A method of fabricating an integrated circuit structure, the method comprising:
A method of fabricating a computing device, the method comprising:
Dependencies are inferred from the claim text.