Field-effect transistor, field-effect transistor array structure and method of manufacturing field-effect transistor

A method of manufacturing a field-effect transistor, the method comprising:

• sequentially stacking a first insulating layer, a first gate electrode, a second insulating layer, and a second conductive layer on a first conductive layer;
• forming a first hole through the first insulating layer, the first gate electrode, the second insulating layer, and the second conductive layer, the first hole exposing a part of the first conductive layer;
• forming a first gate insulating layer covering the second conductive layer, a part of the first conductive layer exposed by the first hole, inner walls of the first insulating layer exposed by the first hole, inner walls of the first gate electrode, and inner walls of the second insulating layer exposed by the first hole, the inner walls formed by the first hole;
• patterning a part of the first gate insulating layer to expose a part of the first conductive layer and at least a part of the second conductive layer;
• forming a semiconductor layer covering the part of the first conductive layer exposed through the first hole, through the first gate insulating layer, and through the second conductive layer;
• forming a second gate insulating layer covering the semiconductor layer;
• and
• forming, on the second gate insulating layer, a second gate electrode filling the first hole.