Loading patent…
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsMing Chyi Liu, Yu-Hsing Chang, Shih-Chang Liu
Estimating the term…
A deep trench is formed in a substrate, and a layer stack including at least three metallic electrode plates interlaced with at least two node dielectric layers is formed in, and over, the deep trench. A contact-level dielectric material layer over the layer stack, and contact via cavities are formed therethrough. The depths of the contact via cavities are differentiated by selectively increasing the depth of a respective subset of the contact via cavities by performing at least twice a combination of processing steps that includes an etch mask formation process and an etch process. A combination of a dielectric contact via liner and a plate contact via structure can be formed within each of the contact via cavities. Plate contact via structures that extend through any metallic electrode plate can be electrically isolated from such a metallic electrode plate by a respective dielectric contact via liner.
A deep trench capacitor comprising:
A semiconductor structure comprising at least one deep trench capacitor located on a substrate, wherein each of the at least one deep trench capacitor comprises:
A deep trench capacitor comprising:
Dependencies are inferred from the claim text.