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AssigneeCanon Kabushiki Kaisha
InventorsRyohei Nozaki, Nana Ohyama, Koichi Gunji
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An image processing apparatus for performing processing that rounds down C bits from an A-bit image, and that causes a B=(A−C) bit image resulting from the rounding down processing to be displayed comprises a time dithering unit configured to express a pixel value that is an intermediate value of one step in the (A−C) bits in the A-bit image by selectively outputting in each frame across N frames a value where the intermediate value was rounded down and a value where the intermediate value was rounded up, and to artificially express the A-bit image with a dither pattern where the N frames is a minimum unit, wherein the time dithering unit sets the value of N so that M/N is 25 or more.
An image processing apparatus for performing processing that rounds down C bits (C is a positive integer) from an A-bit (A is a positive integer) image, and that causes a B=(A−C) bit image resulting from the rounding down processing to be displayed on a display device at a frame rate of M frames/second (M is a positive real number), the image processing apparatus comprising:
An image processing method for performing processing that rounds down C bits (C is a positive integer) from an A-bit (A is a positive integer) image, and that causes a B=(A−C) bit image resulting from the rounding down processing to be displayed on a display device at a frame rate of M frames/second (M is a positive real number), the method comprising:
A non-transitory computer-readable storage medium storing a program for causing a computer to execute the steps of an image processing method for performing processing that rounds down C bits (C is a positive integer) from an A-bit (A is a positive integer) image, and that causes a B=(A−C) bit image resulting from the rounding down processing to be displayed on a display device at a frame rate of M frames/second (M is a positive real number), the method comprising:
Dependencies are inferred from the claim text.