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US 11,637,560 B2Granted
Segmented digital-to-analog converter with subtractive dither
AssigneeIntel Corporation
InventorsMartin Clara, Daniel Gruber, Kameran Azadet
Life of this patent
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AssigneeIntel Corporation
InventorsMartin Clara, Daniel Gruber, Kameran Azadet
Estimating the term…
A segmented digital-to-analog converter (DAC) includes DAC segments, an overrange DAC, and a dither control circuit. Each DAC segment includes a plurality of DAC cells for generating an analog output signal based on input data to each DAC segment. The overrange DAC generates an analog output signal based on a control signal. The dither control circuit adds a dither to first input data supplied to a higher-order DAC segment, subtract a portion of the dither from second input data supplied to a lower-order DAC segment, and generate the control signal for subtracting a remaining portion of the dither from an output of the segmented DAC in an analog domain. The dither added to the first input data may be one of +1, 0, and −1 and the portion of the dither subtracted from the second input data may be a half of the dither added to the first input data.
A segmented digital-to-analog converter (DAC), comprising:
A method for digital-to-analog conversion using a segmented digital-to-analog converter (DAC), wherein the segmented DAC includes at least two DAC segments, and each DAC segment includes a plurality of DAC cells for generating an analog output signal based on input data to each DAC segment, and the segmented DAC includes at least one overrange DAC configured to generate an analog output signal based on a control signal, the method comprising:
Dependencies are inferred from the claim text.