Analog-to-digital converter capable of reducing nonlinearity and method of operating the same

A method of operating an analog-to-digital converter, the analog-to-digital converter comprising a first capacitor array, a second capacitor array, a switch circuit, a comparator and a control logic circuit, the switch circuit being coupled to the first capacitor array and the second capacitor array, the comparator being coupled to the switch circuit, the control logic circuit being coupled to the switch circuit, the comparator comprising a first input terminal and a second input terminal, the method comprising:

• during a first sampling period, switching a switching signal to a first level for the switch circuit to couple the first capacitor array to the first input terminal of the comparator and a first signal source, and to couple the second capacitor array to the second input terminal of the comparator and a second signal source;
• and
• during a second sampling period, switching the switching signal to a second level for the switch circuit to couple the first capacitor array to the second input terminal of the comparator and the second signal source, and to couple the second capacitor array to the first input terminal of the comparator and the first signal source;
• wherein the control logic circuit switches the switching signal between the first level and the second level according to a uniform sequence during a plurality of sampling periods, and the first level and the second level are different from each other.