Semiconductor memory device

A semiconductor memory device comprising:

• a memory cell array configured to store data;
• and
• a first signal propagation circuit disposed on a propagation path of a signal corresponding to the data or a propagation path of a control signal input when a read operation or a write operation of the data is performed,
• wherein the first signal propagation circuit includes:
• first and second signal lines;
• a first inverted signal output circuit configured to include an input terminal connected to the first signal line and an output terminal connected to the second signal line;
• a second inverted signal output circuit configured to include an input terminal connected to the second signal line and an output terminal connected to the first signal line;
• a first switch circuit connected to the first inverted signal output circuit;
• and
• a second switch circuit connected to the second inverted signal output circuit,
• wherein the first switch circuit is connected between the output terminal of the first inverted signal output circuit and the second signal line, or between the first inverted signal output circuit and a first voltage apply line,
• wherein the second switch circuit is connected between the output terminal of the second inverted signal output circuit and the first signal line, or between the second inverted signal output circuit and the first voltage apply line,
• wherein the first switch circuit and the second switch circuit turn ON in response to an input of a first signal, and
• wherein the first switch circuit and the second switch circuit turn OFF in response to an input of a second signal.