Offset calibration circuit and offset calibration method applied in signal processing circuit
AssigneeRealtek Semiconductor Corp.
InventorsChun-Hao Lai, Chung-Lun Li
Life of this patent
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Abstract
The present invention provides an offset calibration circuit used in a signal processing circuit, wherein the offset calibration circuit includes a supply voltage detection circuit and a calibration circuit. The supply voltage detection circuit is configured to detect a level of a supply voltage to generate a detection result, wherein the supply voltage is provided to an output stage in the signal processing circuit. The calibration circuit is configured to calculate a digital compensation value according to the detection result, wherein the digital compensation value is used for a digital processing circuit in the signal processing circuit to perform a DC offset calibration.
Claims10
An offset calibration circuit used in a signal processing circuit, comprising:
- a supply voltage detection circuit, configured to detect a level of a supply voltage to generate a detection result, wherein the supply voltage is provided to an output stage in the signal processing circuit;
- and
- a calibration circuit, configured to calculate a digital compensation value according to the detection result, wherein the digital compensation value is used for a digital processing circuit in the signal processing circuit to perform a DC offset calibration.
An offset calibration method applied in a signal processing circuit, comprising:
- detecting a level of a supply voltage to generate a detection result, where the supply voltage is provided to an output stage in the signal processing circuit;
- and
- calculating a digital compensation value according to the detection result, wherein the digital compensation value is used for a digital processing circuit in the signal processing circuit to perform a DC offset calibration.
Dependencies are inferred from the claim text.