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US 11,637,240 B2Granted
Semiconductor structure and method for forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHsing-Lien Lin, Fu-Ting Sung, Ching Ju Yang, Chii-Ming Wu
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Abstract
A semiconductor memory structure includes a memory cell, an encapsulation layer over a sidewall of the memory cell, and a nucleation layer between the sidewall of the memory cell and the encapsulation layer. The memory cell includes a top electrode, a bottom electrode and a data-storage element sandwiched between the bottom electrode and the top electrode. The nucleation layer includes metal oxide.
Claims20
A semiconductor memory structure comprising:
- a memory cell comprising a bottom electrode, a top electrode and a data-storage element sandwiched between the bottom electrode and the top electrode;
- an encapsulation layer over a sidewall of the memory cell;
- a nucleation layer between the sidewall of the memory cell and the encapsulation layer, wherein the nucleation layer comprises metal oxide;
- a dielectric structure surrounding the memory cell;
- a bottom via disposed in the dielectric structure and coupled to the bottom electrode of the memory cell;
- a top via disposed in the dielectric structure and coupled to the top electrode of the memory cell;
- a first metal layer under the dielectric structure and the memory cell;
- and
- a second metal layer over the dielectric structure and the memory cell,
- wherein the memory cell is electrically connected to the first metal layer by the bottom via, and to the second metal layer by the top via.
7 more elements
A semiconductor memory structure comprising:
- a bottom electrode;
- a data-storage element over the bottom electrode;
- a top electrode over the data-storage element;
- an encapsulation layer over a sidewall of the top electrode, a sidewall of the data-storage element and a sidewall of the bottom electrode;
- a first oxide layer between the sidewall of the bottom electrode and the encapsulation layer;
- a second oxide layer between the sidewall of the data-storage element and the encapsulation layer;
- and
- a third oxide layer between the sidewall of the top electrode and the encapsulation layer,
- wherein the first oxide layer and the third oxide layer comprise a same material, and the second oxide layer comprises a material different from the material of the first oxide layer and the third oxide layer.
6 more elements
A semiconductor memory structure comprising:
- a first dielectric layer,
- a bottom electrode over the first dielectric layer,
- a top electrode over the bottom electrode;
- a data-storage element between the bottom electrode and the top electrode;
- an encapsulation layer over a sidewall of the top electrode, a sidewall of the data-storage element, a sidewall of the bottom electrode, and the first dielectric layer;
- a first oxide layer between the sidewall of the bottom electrode and the encapsulation layer;
- a second oxide layer between the sidewall of the data-storage element and the encapsulation layer;
- and
- a third oxide layer between the sidewall of the top electrode and the encapsulation layer,
- wherein the first oxide layer and the third oxide layer comprise a same material,
- and the second oxide layer comprises a material different from the material of the first oxide layer and the third oxide layer.
8 more elements
Dependencies are inferred from the claim text.