Manufacturing method of semiconductor device including semiconductor element of inversion type

A manufacturing method for a semiconductor device including a semiconductor element of inversion type, the method comprising:

• preparing a substrate made of semiconductor and having a first conductivity type or a second conductivity type;
• forming a drift layer above the substrate, wherein the drift layer is made of semiconductor, has the first conductivity type, and has an impurity concentration smaller than that of the substrate;
• forming an electric field block layer above the drift layer, wherein the electric field block layer is made of semiconductor and has the second conductivity type;
• forming a plurality of trenches arranged in a stripe manner in the electric field block layer so that a longer direction of a respective trench is one direction, and thereafter, forming a plurality of JFET portions by providing semiconductor of the first conductivity type in the plurality of trenches, thereby forming a saturation current suppression layer which includes a plurality of electric field block layers arranged in a stripe manner and the plurality of JFET portions arranged in a stripe manner, wherein:
• a longer direction of a respective JFET portion is the one direction;
• a longer direction of a respective electric field block layers is the one direction;
• and the plurality of electric field block layers and the plurality of JFET portions are alternately arranged;
• forming a current dispersion layer above the saturation current suppression layer, wherein the current dispersion layer is made of semiconductor, has the first conductivity type, and has a first conductivity type impurity concentration larger than that of the drift layer;
• forming a base region above the saturation current suppression layer, wherein the base region is made of semiconductor and has the second conductivity type;
• forming a source region above the base region, wherein the source region is made of semiconductor, has the first conductivity type, and has a first conductivity type impurity concentration larger than that of the drift layer;
• forming a plurality of trench gate structures, including
• forming a plurality of gate trenches which are from a surface of the source region and deeper than the base region and which are arranged in a stripe manner, wherein a longer direction of a respective gate trench intersects with the one direction;
• and
• forming a gate insulating film on an inner wall surface of a respective gate trench and forming a gate electrode on the gate insulating film;
• forming a source electrode electrically connected to the source region;
• and
• forming a drain electrode on a back side of the substrate,
• wherein:
• forming the plurality of JFET portions includes
• forming:
• a first layer located at a bottom surface and a side surface of the trench and having a first conductivity type impurity concentration larger than that of the drift layer;
• and a second layer located above the first layer and having a first conductivity type impurity concentration smaller than that of the drift layer.