Multi-component cell architectures for a memory device

A method, comprising:

• identifying a threshold voltage of a memory cell that comprises a plurality of self-selecting memory components and a plurality of electrodes vertically disposed between each of the plurality of self-selecting memory components, wherein the plurality of self-selecting memory components are for collectively storing one logic state of a set of logic states;
• comparing, based at least in part on the identifying, the threshold voltage of the memory cell to a reference voltage;
• and
• determining, based at least in part on the comparing, the one logic state of the memory cell corresponding to the threshold voltage of the memory cell.

An apparatus, comprising:

• a memory cell comprising a plurality of self-selecting memory components and a plurality of electrodes vertically disposed between each of the plurality of self-selecting memory components, wherein the plurality of self-selecting memory components are configured to collectively store a logic state of a set of logic states based at least in part on a polarity of a programming voltage, each logic state of the set corresponding to a threshold voltage of the memory cell;
• and
• circuitry coupled with the memory cell and configured to:
• apply the programming voltage across the memory cell;
• apply a read voltage across the memory cell after applying the programming voltage;
• and
• determine the one logic state based at least in part on applying the read voltage.