Bottom-gate TFT including gate sidewall spacers formed to relax the local electric field concentration
AssigneeSony Group Corporation
InventorAkiko Honjo
Life of this patent
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AssigneeSony Group Corporation
InventorAkiko Honjo
Estimating the term…
Provided is a thin film transistor, including: a base that includes, on an upper surface, a first region and a second region; a gate electrode that is provided on the first region of the base; a gate insulating film that is provided on a surface of the gate electrode and the second region of the base; and a semiconductor layer that is provided on a surface of the gate insulating film, wherein the semiconductor layer includes a third region and a fourth region, in the third region, the semiconductor layer and the gate electrode face with a minimum interval, in the fourth region, a distance from the semiconductor layer to the gate electrode is larger than the minimum interval, and at a boundary position between the third region and the fourth region, the semiconductor layer forms a linear shape or a substantially linear shape.
A display device comprising:
Dependencies are inferred from the claim text.