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US 11,636,904 B2Granted
Almost ready memory management
AssigneeMicron Technology, Inc.
InventorsYoav Weinberg, Eric N. Lee
Life of this patent
Estimating the term…
Abstract
A method includes determining, via status polling at a first interval, an indicator of an almost ready status of a set of memory cells of a memory device, based on the indicator of the almost ready status, determining the set of memory cells of the memory device is almost ready to complete execution of an operation on the set of memory cells of the memory device, and responsive to determining the set of memory cells of the memory device is almost ready to complete execution of the operation, performing status polling at a second interval.
Claims17
A method comprising:
- determining, via status polling at a first interval, an indicator of an almost ready status of a set of memory cells of a memory device, wherein the indicator further comprises a value in a register in the memory device;
- storing the value in the register based on a current level of completion of an operation on the set of memory cells by:
- determining the current level of completion of the operation satisfies an almost ready threshold;
- responsive to determining the current level of completion of the operation satisfies the almost ready threshold, storing the value in the register;
- based on the indicator of the almost ready status, determining the set of memory cells of the memory device is almost ready to complete execution of an operation on the set of memory cells of the memory device;
- and
- responsive to determining the set of memory cells of the memory device is almost ready to complete execution of the operation, performing status polling of the register at a second interval.
4 more elements
An apparatus, comprising:
- an almost ready memory management component configured to:
- determine a current level of completion of an operation on a set of memory cells of a memory device;
- determine the current level of completion satisfies an almost ready threshold;
- responsive to the determination the current level of completion satisfies the almost ready threshold, store a value in a register associated with the set of memory cells to indicate the set of memory cells is almost ready to complete the operation;
- determine, via status polling at a first interval, the value stored in the register;
- and
- responsive to the determination the value stored in the register indicates the set of memory cells is almost ready, perform status polling of the register at a second interval that is shorter than the first interval.
4 more elements
A system, comprising:
- a plurality of memory components arranged to form a stackable cross-gridded array of a plurality of blocks of NAND memory cells;
- and
- a processing device coupled to the plurality of memory components, the processing device to perform operations comprising:
- performing status polling of a plurality of registers associated with the plurality of blocks of NAND memory cells at a first interval to determine respective values of the registers;
- based on a value stored in a register of the plurality of registers that is associated with a block of NAND memory cells, determining the block of NAND memory cells is almost ready to complete execution of an operation on the block of NAND memory cells;
- and
- responsive to determining the block of NAND memory cells is almost ready to complete execution of the operation, performing status polling of the register associated with the block of NAND memory cells at a second interval.
4 more elements
Dependencies are inferred from the claim text.