Memory device with multiple row buffers
AssigneeMicron Technology, Inc.
InventorsSean S. Eilert, Ameen D. Akel, Shivam Swami
Life of this patent
Estimating the term…
Abstract
An example memory sub-system includes: a plurality bank groups, wherein each bank group comprises a plurality of memory banks; a plurality of row buffers, wherein two or more row buffers of the plurality of row buffers are associated with each bank group; and a processing logic communicatively coupled to the plurality of bank groups and the plurality of row buffers, the processing logic to perform operations comprising: receiving, from a host, a command identifying a row buffer of the plurality of row buffers; and perform an operation with respect to the identified row buffer.
Claims20
A memory sub-system, comprising:
- a plurality of bank groups, wherein each bank group comprises a plurality of memory banks;
- a plurality of row buffers, wherein two or more row buffers of the plurality of row buffers are shared between two or more memory banks of a bank group of the plurality of bank groups;
- a processing logic communicatively coupled to the plurality of bank groups and the plurality of row buffers, the processing logic to perform operations comprising:
- receiving, from a host, a command identifying a row of a certain memory bank;
- identifying, among the plurality of row buffers, a row buffer associated with the row by row buffer assignment metadata, wherein the row buffer assignment metadata comprises, for each row buffer of the plurality of row buffers, a corresponding tag identifying a row that is temporarily associated with the row buffer;
- and
- perform a memory access operation using the row buffer.
A memory sub-system, comprising:
- a plurality of bank groups, wherein each bank group comprises a plurality of memory banks;
- a plurality of row buffers, wherein two or more row buffers of the plurality of row buffers are associated with each bank group;
- a processing logic communicatively coupled to the plurality of bank groups and the plurality of row buffers, the processing logic to perform operations comprising:
- receiving, from a host, a command identifying a row of a certain memory bank;
- identifying, among the plurality of row buffers, a row buffer associated with the row by row buffer assignment metadata, wherein the row buffer assignment metadata comprises, for each row buffer of the plurality of row buffers, a corresponding tag identifying a row that is temporarily associated with the row buffer;
- and
- performing a memory access operation using the row buffer.
A method, comprising:
- receiving, by a memory sub-system comprising a plurality of memory banks grouped into a plurality of bank groups, a command from a host, the command identifying a row of a certain memory bank of the plurality of memory banks;
- identify, among a set of row buffers associated with the memory bank, a row buffer associated with the row by row buffer assignment metadata, wherein the row buffer assignment metadata comprises, for each row buffer of the set of row buffers, a corresponding tag identifying a row that is temporarily associated with the row buffer;
- and
- perform a memory access operation using the row buffer.
Dependencies are inferred from the claim text.