Scan driver and display device
AssigneeSamsung Display Co., Ltd.
InventorsSeong Heon Cho, Hae-Kwan Seo
Life of this patent
Estimating the term…
Abstract
A scan driver includes: a plurality of stages, each stage including: a logic circuit configured to transfer an input signal to a first node in response to a first clock signal, and to bootstrap the first node in response to a second clock signal; a carry output circuit configured to output the second clock signal as a carry signal that is provided as the input signal for a next stage in response to a voltage of the bootstrapped first node; and a masking controller configured to receive a masking signal and the carry signal, and to output the masking signal as a scan signal provided to a pixel row corresponding to the each stage in response to the carry signal.
Claims20
A scan driver comprising:
- a plurality of stages, each stage comprising:
- a first circuit configured to transfer an input signal to a first node in response to a first clock signal, and to change a voltage of the first node from a first level to a second level in response to a second clock signal;
- a second circuit configured to output the second clock signal as a carry signal that is provided as the input signal for a next stage in response to the voltage of the first node having the second level;
- and
- a masking controller configured to receive a masking signal and the carry signal, and to output the masking signal as a scan signal provided to a pixel row corresponding to the each stage in response to the carry signal, wherein the masking controller includes:
- a first transistor including a gate configured to receive the carry signal, a first terminal coupled to a scan output node at which the scan signal is output, and a second terminal configured to receive the masking signal.
A display device comprising:
- a display panel including a plurality of pixel rows;
- a data driver configured to provide data signals to each of the plurality of pixel rows;
- a scan driver configured to provide a plurality of scan signals to the plurality of pixel rows, respectively;
- and
- a controller configured to control the data driver and the scan driver,
- wherein the scan driver includes a plurality of stages, and each stage comprises:
- a first circuit configured to transfer an input signal to a first node in response to a first clock signal, and to change a voltage of the first node from a first level to a second level in response to a second clock signal;
- a second circuit configured to output the second clock signal as a carry signal that is provided as the input signal for a next stage in response to the voltage of the first node having the second level;
- and
- a masking control circuit configured to receive a masking signal and the carry signal, and to output the masking signal as a scan signal of the plurality of scan signals provided to a pixel row corresponding to the each stage among the plurality of pixel rows in response to the carry signal, wherein the masking control circuit includes:
- a transistor including a gate configured to receive the carry signal, a first terminal coupled to a scan output node at which the scan signal is output, and a second terminal configured to receive the masking signal.
Dependencies are inferred from the claim text.