Protection against fault attacks by duplication
AssigneeNXP B.V.
InventorVitaly Ocheretny
Life of this patent
Estimating the term…
Abstract
Various embodiments relate to a circuit system, including: an original circuit; a dual circuit, wherein the dual circuit is a dual of the original circuit; an input inverter connected the dual circuit, wherein the input inverter inverts system inputs; an output inverter connected to one of the original circuit and the dual circuit, wherein the output inverter inverts the output of the connected original circuit or dual circuit; and a comparator receiving and comparing the output of the invertor and the output of one of the original circuit and the dual circuit not connected to the inverter, wherein the comparator indicates an error when the received outputs are not identical and indicating no error when the received outputs are identical.
Claims13
A circuit system, comprising:
- an original circuit configured to produce an output in response to an input, wherein the original circuit includes first and second sub-circuits connected by a first register;
- a dual circuit, wherein the dual circuit is a dual of the original circuit such that when the dual circuit receives an inverted input the dual circuit produces an inverted output that is the inverse of the output of the original circuit when it receives the input, wherein the dual circuit includes first and second dual sub-circuits connected by a second register, the first and second dual sub-circuits are duals of the first and second sub-circuits, and wherein the first and second registers receive a reset signal, and one of the first and second resisters uses flip-flops with asynchronous reset and the other register uses flip-flops with asynchronous set;
- an input inverter connected to the dual circuit, wherein the input inverter inverts system inputs;
- an output inverter connected to one of the original circuit and the dual circuit, wherein the output inverter inverts the output of the connected original circuit or dual circuit;
- and
- a comparator receiving and comparing the output of the output inverter and the output of one of the original circuit and the dual circuit not connected to the output inverter, wherein the comparator indicates an error when the received outputs are not identical and indicating no error when the received outputs are identical.
A secure system, comprising:
- an original circuit configured to produce an output in response to an input, wherein the original circuit includes first and second sub-circuits connected by a first register;
- a dual circuit, wherein the dual circuit is a dual of the original circuit such that when the dual circuit receives an inverted input the dual circuit produces an inverted output that is the inverse of the output of the original circuit when it receives the input, wherein the dual circuit includes first and second dual sub-circuits connected by a second register, the first and second dual sub-circuits are duals of the first and second sub-circuits, and wherein the first and second registers receive a reset signal, and one of the first and second resisters uses flip-flops with asynchronous reset and the other register uses flip-flops with asynchronous set;
- an input inverter connected to the dual circuit, wherein the input inverter inverts system inputs;
- an output inverter connected to one of the original circuit and the dual circuit, wherein the output inverter inverts the output of the connected original circuit or dual circuit;
- and
- a comparator receiving and comparing the output of the output inverter and the output of one of the original circuit and the dual circuit not connected to the output inverter, wherein the comparator indicates an error when the received outputs are not identical and indicating no error when the received outputs are identical.
Dependencies are inferred from the claim text.