Non-volatile memory express (NVMe) data processing method and system

A data processing method implemented by a host, the data processing method comprising:

• communicating with a Non-Volatile Memory express (NVMe) controller using a network;
• determining first entrance information of a target input/output (I/O) submission queue based on an identifier of the target I/O submission queue of a to-be-sent data operation request;
• and
• sending a first packet to the NVMe controller using at least two data operation requests as payload data of the first packet when a submission queue entry (SQE) coalescing condition is met,
• wherein the first packet comprises the first entrance information and at least one SQE, wherein a maximum number of the at least two data operation requests of the first packet is determined by negotiating a maximum quantity of coalesced SQEs (MCS) in each I/O submission queue (SQ) with the host, and wherein the MCS is a smaller value of a first maximum quantity of coalesced SQEs in each I/O SQ supported by the NVMe controller and a second maximum quantity of coalesced SQEs in each I/O SQ supported by the host.

A Non-Volatile Memory express (NVMe) controller, wherein the NVMe controller comprises:

• a processor;
• and
• a first memory provided with at least one input/output (I/O) submission queue, wherein the processor is configured to:
• communicate with a host using a network;
• receive a first packet from the host, wherein the first packet comprises first entrance information of a target I/O submission queue and at least one submission queue entry (SQE);
• store the at least one SQE in the target I/O submission queue based on the first entrance information of the target I/O submission queue;
• and
• send a second packet to the host using operation results of at least two data operation requests as payload data of the second packet when a completion queue entry (CQE) coalescing condition is met,
• wherein a maximum number of the at least two data operation requests of the second packet is determined by negotiating a maximum quantity of coalesced CQEs (MCC) in each I/O complement queue (CQ) with the host, and wherein the MCC is a smaller value of a first MCC in each I/O CQ supported by the NVMe controller and a second MCC in each I/O CQ supported by the host.

A storage system comprising:

• a Non-Volatile Memory express (NVMe) controller;
• and
• a host configured to:
• communicate with the NVMe controller using a network;
• determine first entrance information of a target input/output (I/O) submission queue based on an identifier of the target I/O submission queue of a to-be-sent data operation request;
• and
• send a first packet to the NVMe controller using at least two data operation requests as payload data of the first packet when a submission queue entry (SQE) coalescing condition is met,
• wherein the NVMe controller is configured to:
• receive the first packet from the host, wherein the first packet comprises the first entrance information of the target I/O submission queue and at least one submission queue entry (SQE);
• store the at least one SQE in the target I/O submission queue based on the first entrance information of the target I/O submission queue;
• and
• send a second packet to the host using operation results of at least two data operation requests as payload data of the second packet when a completion queue entry (CQE) coalescing condition is met,
• wherein a maximum number of the at least two data operation requests of the second packet is determined by negotiating a maximum quantity of coalesced CQEs (MCC) in each I/O complement queue (CQ) with the host, and wherein the MCC is a smaller value of a first MCC in each I/O CQ supported by the NVMe controller and a second MCC in each I/O CQ supported by the host.

A Non-Volatile Memory express (NVMe) subsystem comprising:

• an NVMe controller;
• and
• at least one solid-state drive (SSD), wherein the NVMe controller is configured to:
• communicate with a host using a network;
• receive a first packet from the host, wherein the first packet comprises first entrance information of a target I/O submission queue and at least one submission queue entry (SQE);
• store the at least one SQE in the target I/O submission queue based on the first entrance information of the target I/O submission queue;
• and
• send a second packet to the host using operation results of at least two data operation requests as payload data of the second packet when a completion queue entry (CQE) coalescing condition is met,
• wherein a maximum number of the at least two data operation requests of the second packet is determined by negotiating a maximum quantity of coalesced CQEs (MCC) in each I/O complement queue (CQ) with the host, and wherein the MCC is a smaller value of a first MCC in each I/O CQ supported by the NVMe controller and a second MCC in each I/O CQ supported by the host.