Sleeping and waking-up address translation that conflicts with translation level of active page table walks

A memory address translation system comprising:

• a translation requestor module configured to provide a translation request to translate from a virtual address (VA) to a real address (RA) of a physical memory;
• a translation cache module coupled to the translation requestor module and configured to receive the translation request from the translation requestor module;
• a group of table walk machines coupled to the translation cache module and the translation requestor module and configured to perform table walks;
• and
• a sleep and wake control module coupled to the translation requestor module, translation cache module, and the group of table walk machines, wherein the sleep and wake control module is configured to:
• compare the received VA to VA's of all presently active table walks of the group of table walk machines;
• upon determining, based on the comparison, that there is an address match in a given table walk machine of the group of table walk machines, sending the translation request with an identification number (ID) to the translation requestor module, the translation request to be put to sleep;
• upon determining that the given table walk machine has completed its translation level, sending a wake-up signal with the ID to the translation requestor module, the translation requestor module to trigger a wake-up and processing of the put to sleep translation request;
• and
• in response to (i) triggering of the wake-up and the processing of the put to sleep translation request and (ii) determination that there is no address match between the received VA and the given table walk machine, providing a table walk, of the VA of the translation request with the ID, in parallel with one or more other table walks of other translation requests of the group of table walk machines.

A computing device comprising:

• a processor;
• a physical memory coupled to the processor;
• a memory address translation system coupled to the processor and configured to:
• receive a translation request to translate from a virtual address (VA) to a real address (RA) of the physical memory;
• compare the received VA to VA's of all presently active table walks of a group of table walk machines;
• and
• upon determining, based on the comparison, that there is an address match in a given table walk machine of the group of table walk machines, send the translation request with an identification number (ID) to a translation requestor module, the translation request to be put to sleep;
• upon determining that the given table walk machine has completed its translation level, send a wake-up signal with the ID to the translation requestor module, the translation requestor module to trigger a wake-up and processing of the put to sleep translation request;
• and
• in response to (i) the triggering of the wake-up and the processing of the put to sleep translation request and (ii) determination that there is no address match between the received VA and the given table walk machine, provide a table walk, of the VA of the translation request with the ID, in parallel with one or more other table walks of other translation requests of the group of table walk machines.