Data processing method for improving access performance of memory device and data storage device utilizing the same
AssigneeSilicon Motion, Inc.
InventorYu-Ta Chen
Life of this patent
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AssigneeSilicon Motion, Inc.
InventorYu-Ta Chen
Estimating the term…
A data storage device includes a memory device including multiple memory blocks corresponding to multiple sub-regions and a memory controller. The memory controller updates content of a read count table in response to a read command with a transfer length greater than 1 for designating more than one logical address to be read. The read count table includes multiple fields recording a read count associated with one sub-region and content of the read count table is updated by increasing the read count(s) associated with the sub-region(s) that logical addresses designated in the read command belong to. The memory controller selects at least one sub-region according to the content of the read count table and performs a data rearrangement procedure to move data of the logical addresses belonging to the selected at least one sub-region to a first memory space of the memory device having continuous physical addresses.
A data storage device, comprising:
A data processing method for a data storage device, wherein the data storage device comprises a memory device and a memory controller, the memory device comprises a plurality of memory blocks, the memory blocks correspond to a plurality of logical units, each logical unit corresponds to a plurality of logical addresses, the logical addresses corresponding to each logical unit are divided into a plurality of regions, and each region is further divided into a plurality of sub-regions and each sub-region corresponds to multiple continuous logical addresses, the memory controller is coupled to the memory device and configured to access the memory device, and the data processing method is performed by the memory controller and comprises:
Dependencies are inferred from the claim text.