Memory sub-system signature generation
AssigneeMicron Technology, Inc.
InventorKelsey J. Dobner
Life of this patent
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Abstract
A method includes receiving signaling indicative of performance of a shutdown operation involving a memory device to a controller resident on the memory device; initiating a power off sequence in response to the received signaling, wherein the power off sequence includes execution of instructions corresponding to a plurality of routines; and writing data comprising respective shutdown signatures associated with execution of the plurality of routines to a media associated with the memory device upon completion of each of one or more of the plurality of routines, wherein the media is bit-addressable or byte-addressable.
Claims20
A method, comprising:
- receiving signaling indicative of performance of a shutdown operation involving a memory device to a controller resident on the memory device;
- initiating a power off sequence in response to the received signaling, wherein the power off sequence includes execution of instructions corresponding to a plurality of routines;
- and
- writing data comprising respective shutdown signatures associated with execution of the plurality of routines to a media associated with the memory device upon completion of each of one or more of the plurality of routines, wherein the media is bit-addressable or byte-addressable.
An apparatus, comprising:
- a signature generating component configured to:
- receive signaling indicative of performance of a shutdown operation involving a memory device to a controller resident on the memory device;
- initiate a power off sequence in response to the received signaling, wherein the power off sequence includes a plurality of routines;
- and
- write a respective shutdown signature to a media upon completion of each of one or more of the plurality of routines, wherein the media is bit-addressable or byte-addressable.
A system, comprising:
- a plurality of memory components;
- and
- a processing device coupled to the plurality of memory components, wherein the processing device is to perform operations comprising:
- receiving signaling indicative of performance of a shutdown operation involving one or more of the plurality of memory components;
- initiating a power off sequence in response to the received signaling, wherein the power off sequence includes a plurality of routines;
- storing a respective shutdown signature to a non-volatile media upon completion of each of one or more of the plurality of routines;
- and
- aborting the power off sequence when one of the plurality of routines is not completed.
Dependencies are inferred from the claim text.