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US 11,635,894 B2Granted
Clustered parity for NAND data placement schema
AssigneeMicron Technology, Inc.
InventorsPaolo Papa, Carminantonio Manganelli, Massimo Iaculo, Giuseppe D'Eliseo, Alberto Sassara
Life of this patent
Estimating the term…
Abstract
Disclosed in some examples are improvements to data placement architectures in NAND that provide additional data protection through an improved NAND data placement schema that allows for recovery from certain failure scenarios. The present disclosure stripes data diagonally across page lines and planes to enhance the data protection. Parity bits are stored in SLC blocks for extra protection until the block is finished writing and then the parity bits may be deleted.
Claims18
A NAND memory device comprising:
- an array of NAND memory cells organized into multiple planes and addressable by multiple page lines;
- and
- a controller configured to perform operations comprising:
- programming a received data item into a first data stripe by programming a first portion of the received data item into a first page line of the multiple page lines on a first plane of the multiple planes, a second portion of the received data item into a second page line of the multiple page lines on a second plane of the multiple planes, and a third portion of the received data item into a third page line of the multiple page lines on a third plane of the multiple planes, wherein a third page number of the third page line is greater than a second page number of the second page line and a third plane number of the third plane is greater than a second plane number of the second plane, and wherein a second page number of the second page line is greater than a first page number of the first page line and a second plane number of the second plane is greater than a first plane number of a first plane;
- calculating a parity value for the received data item using the first portion, second portion, and third portion;
- storing the parity value with multiple other parity values in a first parity cluster of multiple parity clusters, each particular one of the other parity values storing a parity value for a different stripe, the parity values stored in the multiple page lines and the multiple planes;
- compressing the parity value and the multiple other parity values by combining parity values occupying a same plane number and a same page number relative to the first page number of a parity cluster within the multiple parity clusters to create compressed parity values;
- storing the compressed parity values in the array of NAND cells and
- wherein the operations of storing the compressed parity values in the array of NAND cells comprises overwriting the multiple other parity values with the compressed parity values.
6 more elements
A non-transitory machine-readable medium, comprising instructions, which when executed by a machine, cause the machine to perform operations comprising:
- programming a received data item into a first data stripe by programming a first portion of the received data item into a first page line of multiple page lines on a first plane of multiple planes of a NAND array, a second portion of the received data item into a second page line of the multiple page lines on a second plane of the multiple planes, and a third portion of the received data item into a third page line of the multiple page lines on a third plane of the multiple planes, wherein a third page number of the third page line is greater than a second page number of the second page line and a third plane number of the third plane is greater than a second plane number of the second plane, and wherein a second page number of the second page line is greater than a first page number of the first page line and a second plane number of the second plane is greater than a first plane number of a first plane;
- calculating a parity value for the received data item using the first portion, second portion, and third portion;
- storing the parity value with multiple other parity values in a first parity cluster of multiple parity clusters, each particular one of the other parity values storing a parity value for a different stripe, the parity values stored in the multiple page lines and the multiple planes;
- compressing the parity value and the multiple other parity values by combining parity values occupying a same plane number and a same page number relative to the first page number of a parity cluster within the multiple parity clusters to create compressed parity values;
- storing the compressed parity values in the NAND array;
- and
- wherein the operations of storing the compressed parity values in the array of NAND cells comprises overwriting the multiple other parity values with the compressed parity values.
4 more elements
A method of storing data on a NAND device that includes an array of NAND memory cells organized into multiple planes and addressable by multiple page lines, the method comprising:
- programming a received data item into a first data stripe by programming a first portion of the received data item into a first page line of the multiple page lines on a first plane of the multiple planes, a second portion of the received data item into a second page line of the multiple page lines on a second plane of the multiple planes, and a third portion of the received data item into a third page line of the multiple page lines on a third plane of the multiple planes, wherein a third page number of the third page line is greater than a second page number of the second page line and a third plane number of the third plane is greater than a second plane number of the second plane, and wherein a second page number of the second page line is greater than a first page number of the first page line and a second plane number of the second plane is greater than a first plane number of a first plane;
- calculating a parity value for the received data item using the first portion, second portion, and third portion;
- storing the parity value with multiple other parity values in a first parity cluster of multiple parity clusters, each particular one of the other parity values storing a parity value for a different stripe, the parity values stored in the multiple page lines and the multiple planes;
- compressing the parity value and the multiple other parity values by combining parity values occupying a same plane number and a same page number relative to the first page number of a parity cluster within the multiple parity clusters to create compressed parity values;
- and
- storing the compressed parity values in the array of NAND cells;
- and
- wherein storing the compressed parity values in the array of NAND cells comprises overwriting the multiple other parity values with the compressed parity values.
5 more elements
Dependencies are inferred from the claim text.