Power management integrated circuit for monitoring output voltage, memory module including power management integrated circuit and memory device, and operating method of memory module

A computing system, comprising:

• a host device;
• and
• a plurality of memory modules each comprising a memory device and a power management integrated circuit (PMIC) including a voltage regulator configured to supply an operating voltage to the memory device, the PMIC outputting monitoring data to the host device indicative of a number of voltage range violations of the operating voltage at each of a plurality of periodic intervals,
• wherein the host device is configured to maintain a power integrity of each memory module based on the monitoring data output by the PMIC.

A computing system, comprising:

• a host device comprising a processor and first and second memory controllers operatively connected to the processor;
• a plurality of first memory modules operatively connected to the first memory controller over a first channel, each of the first memory modules including a plurality of first memory devices and a first power management integrated circuit (PMIC) operatively connected to the first channel and to the plurality of first memory modules;
• and
• a plurality of second memory modules operatively connected to the second memory controller over a second channel, each of the second memory modules including a plurality of second memory devices and a second PMIC operatively connected to the second channel and to the plurality of second memory modules,
• wherein the first PMIC of each first memory module includes a first voltage regulator configured to supply first operating voltages to the first memory devices, and a first monitoring circuit configured to count a number of voltage range violations of the first operating voltages at periodic intervals and to output monitoring data indicative of the number of voltage range violations over the first channel to the host device, and
• wherein the second PMIC of each second memory module includes a second voltage regulator configured to supply second operating voltages to the second memory devices, and a second monitoring circuit configured to count a number of voltage range violations of the second operating voltages at period intervals and to output monitoring data indicative of the number of voltage range violations over the second channel to the host device.

A method of operating a memory system, the memory system including a host device and a memory module, the memory module including a memory device and a power management integrated circuit (PMIC), the method comprising:

• supplying an operating voltage from the PMIC to the memory device;
• transmitting a read/write command from the host device to the memory device, and processing the read/write command to output read data from the memory device to the host device or to write data from the host device to the memory device;
• monitoring, by the PMIC and during the processing of the read/write command, a feedback voltage of the operating voltage to determine at each of periodic intervals whether the feedback voltage is outside a threshold voltage range;
• and
• transmitting monitoring data from the PMIC to the host device denoting a count value, the count value corresponding to a number of times the feedback voltage was determined to be outside the threshold voltage range.