Systems and methods for feedforward process control in the manufacture of semiconductor devices
AssigneeKLA Corporation
InventorsRoie Volkovich, Liran Yerushalmi, Achiam Bar
Life of this patent
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Abstract
A method for process control in the manufacture of semiconductor devices including performing metrology on at least one Design of Experiment (DOE) semiconductor wafer included in a lot of semiconductor wafers, the lot forming part of a batch of semiconductor wafer lots, generating, based on the metrology, one or more correctables to a process used to manufacture the lot of semiconductor wafers and adjusting, based on the correctables, the process performed on at least one of; other semiconductor wafers included in the lot of semi-conductor wafers, and other lots of semiconductor wafers included in the batch.
Claims16
A method for process control in the manufacture of semiconductor devices comprising:
- generating at least one Design of Experiment (DOE) semiconductor wafer prior to performing metrology thereon, wherein said generating said DOE semiconductor wafer comprises varying at least one DOE parameter across said DOE semiconductor wafer, and wherein said DOE parameter is associated with misregistration of layers of said DOE semiconductor wafer with respect to each other;
- performing said metrology on said at least one DOE semiconductor wafer included in a lot of semiconductor wafers, said lot forming part of a batch of semiconductor wafer lots, wherein said metrology comprises measurement of misregistration between said layers of said DOE semiconductor wafer;
- generating, based on said metrology, one or more correctables to a process used to manufacture said lot of semiconductor wafers;
- and
- adjusting, based on said correctables, said process performed on at least one of:
- other semiconductor wafers included in said lot of semiconductor wafers, and
- other lots of semiconductor wafers included in said batch.
A system for process control in the manufacture of semiconductor devices comprising:
- a metrology tool operative to perform metrology on at least one Design of Experiment (DOE) semiconductor wafer included in a lot of semiconductor wafers, said lot forming part of a batch of semiconductor wafer lots, wherein said metrology comprises measurement of misregistration between layers of said DOE semiconductor wafer, wherein said DOE semiconductor wafer includes at least one DOE parameter varied across said DOE semiconductor wafer, and wherein said DOE parameter is associated with misregistration of layers of said DOE semiconductor wafer with respect to each other;
- a correctable generator operative to generate, based on said metrology, one or more correctables to a process used to manufacture said lot of semiconductor wafers;
- and
- a controller operative to receive said correctables generated by said correctable generator and to controllably adjust said process, in accordance with said correctables, performed on at least one of:
- other semiconductor wafers included in said lot of semiconductor wafers, and
- other lots of semiconductor wafers included in said batch.
Dependencies are inferred from the claim text.