Voltage level shifter applicable to very-low voltages

A voltage level shifter circuit, comprising:

• a cross-coupled transistor network comprising (i) a first field-effect transistor (FET) of a first conductivity type having a source coupled to a first supply conductor that is configured to be electrically connected to a first supply voltage, (ii) a first plurality of series-connected diode-connected FETs of the first conductivity type, including a first diode-connected FET having a source electrically connected to a drain of the first FET, and a third diode-connected FET (iii) a second FET of the first conductivity type having a source coupled to the first supply conductor and having a gate coupled to the gate and drain of the third diode-connected FET, and (iv) a second plurality of series-connected diode-connected FETs of the first conductivity type, including a second diode-connected FET having a source electrically connected to a drain of the second FET, and a fourth diode-connected FET having a gate and a drain coupled to a gate of the first FET;
• a first input FET of a second conductivity type opposite to the first conductivity type, the first input FET having a source coupled to a second supply conductor that is configured to be electrically connected to a second supply voltage, a drain coupled to the drain of the third diode-connected FET, and a gate configured to receive an input logic signal having an input voltage swing that ranges from the second supply voltage to a third supply voltage that is between the second supply voltage and the first supply voltage;
• a second input FET of the second conductivity type, the second input FET having a source coupled to the second supply conductor, a drain coupled to the drain of the fourth diode-connected FET, and a gate configured to receive a second input logic signal having said input voltage swing and being complementary to the first input logic signal;
• and
• an output buffer transistor circuit coupled to the first supply conductor, to the second supply conductor, and to at least one node of the cross-coupled transistor network, and configured to provide an output logic signal corresponding to the input logic signal and having an output voltage swing that ranges from the second supply voltage to the first supply voltage.