Semiconductor integrated circuit and receiver

A semiconductor integrated circuit comprising:

• a first power supply line to which a first voltage is applied;
• a second power supply line to which a second voltage is applied, the second voltage being lower than the first voltage;
• a first node arranged between the first power supply line and the second power supply line and configured to output, based on first differential signals input to the semiconductor integrated circuit, one of second differential signals;
• a second node arranged between the first power supply line and the second power supply line and configured to output the other of the second differential signals;
• a first circuit comprising a first transistor and a second transistor, the first transistor including a first end coupled to the first node and a gate to which a first control signal is input, the second transistor including a first end coupled to the second node and a gate to which an inverted signal of the first control signal is input, a second end of the first transistor and a second end of the second transistor both being electrically coupled to the second power supply line, the first circuit being configured to supply a first current to the second power supply line, from the first node via the first transistor or from the second node via the second transistor;
• and
• a second circuit comprising a third transistor and a fourth transistor, the third transistor including a first end coupled to the first node and a second end coupled to the first power supply line, the fourth transistor including a first end coupled to the second node and a second end coupled to the first power supply line, the second circuit being configured to supply a second current from the first power supply line to the first node via the third transistor based on a magnitude of the first current, and to supply a third current from the first power supply line to the second node via the fourth transistor based on the magnitude of the first current.